Why SiC Needs a Stronger European Materials Backbone
Across mobility, renewable energy, and power infrastructure, the shift toward higher‑efficiency and lower‑emissions technologies is accelerating. In this evolving landscape, Silicon Carbide (SiC) has become a key enabler of high‑temperature, high‑frequency, and high‑power‑density systems. But unlocking SiC’s full performance is not only a matter of advanced device engineering it depends equally on the materials, substrates, and interconnects that form the structural backbone of every module.
Enter FastLane, a European initiative launched in 2024 and built around a simple but ambitious mission: strengthen the EU’s independence, sustainability, and competitiveness in SiC power electronics from raw materials to system‑level demonstrators.
The project unites 29 partners from seven countries, blending research institutes, SMEs, and industry leaders to accelerate innovation across the SiC value chain. Under this framework, Heraeus Electronics contributes crucial packaging technologies that improve module performance, durability, and manufacturability.

As demand surges for SiC‑based converters, traction inverters, and grid‑connected modules, Europe faces three structural challenges:
FastLane addresses these issues head‑on with a coordinated multi‑year program focused on:
Heraeus Electronics’ contributions target the packaging stage — the point where material science and system engineering meet.

1. Silver Sintering for High‑Performance, Low‑Cost AMB Attachment:
Traditional SiC power module architectures often rely on copper baseplates with precious‑metal metallization, which adds weight, cost, and supply risk. Heraeus Electronics addresses these limitations through a specialized silver sinter paste (PE 360P) that enables the attachment of Active Metal Brazed (AMB) substrates not only on copper but also to aluminum baseplates
Why this matters
Reliable performance, even with coated aluminum vs. copper baseplates

These results show that sintered silver module attach on aluminum creates a lighter, more economical foundation for next‑generation SiC power modules without sacrificing reliability. Ongoing project work continues to optimize sintering directly on non‑precious‑metal coatings, i.e. copper to simplify the production flow further.

A major bottleneck in high‑frequency SiC modules is parasitic inductance, which causes voltage overshoot, switching losses, and EMI challenges. To address this, Heraeus Electronics developed silver‑free AMB substrates using silicon nitride ceramic (Si₃N₄).
Key benefits

The adoption of these new AMB substrates provides a foundation for low‑inductance, high‑current designs suited for both traction inverters and stationary energy systems. Their integration into Valeo’s low‑inductance module designs is already planned as a next step within FastLane.
3. Die Top System (DTS®): Enabling Highly Reliable Copper Wire Bonding
Top‑side interconnects exert significant influence over module durability — especially under high‑temperature and high‑current operation. Heraeus Electronics developed the Die Top System (DTS®) to enable copper wire bonding directly onto SiC dies.
What DTS® delivers
Copper wire bonding is crucial for high‑current SiC modules, making DTS® a critical enabler of next‑generation inverter topologies in both automotive and industrial applications.

First‑Year Achievements: Progress from Concept to Integration:
During the first year of FastLane, Heraeus Electronics and its partners successfully delivered three packaging building blocks now moving into module‑level integration and reliability testing:
These innovations are now being validated across multiple SiC power module architectures to assess switching behavior, mechanical stability, and long‑term endurance under representative operating conditions.
FastLane links material innovations to system‑level use cases in two high‑impact sectors: automotive and energy.
E‑Mobility Demonstrators:
These demonstrators help validate module designs where weight reduction, thermal resistance, and interconnect robustness directly influence performance and service life.
Energy System Demonstrators:
Each demonstrator creates a feedback loop between material performance and system‑level requirements, accelerating application‑ready SiC module development.
Conclusion: A Stronger, More Resilient European SiC Ecosystem
FastLane’s packaging contributions are more than incremental technical improvements - they represent strategic building blocks for Europe’s future in power electronics.
By combining:
Europe moves closer to achieving:
These advancements set the foundation for high‑performance SiC demonstrators and, ultimately, accessible and reliable power solutions for mobility, renewable energy, and grid applications throughout Europe.
ACKNOWLEDGMENT
The project is supported by the Chips Joint Undertaking (JU) and its members, including top-up funding by Austria, France, Germany, Romania, Slovakia, under grant agreement No 101139788.

In Germany, this project is co-funded by the Federal Ministry of Research, Technology and Space (project no. 16MEE0415).
